The prototype 3-bit tram/elevator system consists of:
a) a prototype CPU unit to process inputs from both tram and stations (tram is a priority)
b) up to 8 stations (2 included to make it easier to understand the system)
c) a carriage (tram) with internal controls and an automatic door, already docked to the rail
d) blinking station lights to indicate tram movement (using tram movement detector and rotator-based clock)
e) automatic tram door
The system should be fool-proof as it blocks extra inputs after the first station input is activated and also should prevent activation in case the tram is moving (it is hard to test without extra people trying to break CPU logic)
All logic is exposed to allow easy exploration.
All inputs and outputs are marked to allow easy connection of 6 extra stations
The system is equipped with a dock to allow easy installation on an existing vessel (just ensure you have enough space, the CPU is rather large)
Consists of 3 entities.
Please report any bugs experienced while using the system.
Current known bugs:
1) Due to tram input priority over station input, it is almost impossible to call a tram to a station with the code similar to a code on a tram input. Although in normal exploitation this should not be an issue. Working on a solution.
We've removed some functionality from SMD in preparation for a migration to new forum software. We expect to make the move before the end of August.
3-bit logic tram/elevator system Alpha-2
Just like on Ishimura! (not visually)
- Transit system update Sep 4, 2016