Wow, time sure flies right? I don't want this thread to go the way of my previous logic threads and just die out, so I'll post a quick little update. I have the whole regex system for input and output from logic circuits all mapped out, but I haven't put the work into actually building any of it. For you see, I'm a lazy Y-hole. (kek starmade reference)
Any who, on to a quick description of the system: Using some regex templates, any circuit can be retrofitted to use this system. I plan to make response times between different circuits less than one logic cycle, because other than that it would just be quicker to build everything together in the first place. The system should be able to pick out any number of arguments from a string that is handed it, and properly feed signals to the logic circuit given those inputs.
For an example:
A logic circuit needs to have a number added to another number. Using the regex output template, it sends a string to the controller module, including it's own name in the string.
[ ;main;calc;+;2;2;4; ]
The controller module then uses it's database of connected modules to feed the string, minus the module names, to the correct logic circuit.
[ ;+;2;2;4; ]
The logic circuit receives that string, and using its built in parser from the regex input template, decodes the signal and sends the proper logic signals to the circuit. After doing its calculations, it then sends a return signal similar to this:
[ ;calc;main;8; ]
The process is then repeated so the string is sent to the proper module.
The issue I see with this is that it would be difficult to decide what to do with this data, as each regex input would have to have dedicated logic for each of the modules that it can receive data from. I quickly thought of a method to solve this, using the helpful regex counters that several posters have shown me. Inside the module controller would have to be a simple counter, that gives a ticket number to each process being performed by the different circuits. It might be possible, using this method, to make a pseudo multi-threaded CPU, though I'm not sure how efficient it would be. There would have to be data buffers on the input and output of the module controller, or I guess in this case it would be called the CPU?
This post is a bit longer than I anticipated, but it helps to substantiate my ideas, it helps me to think when I write everything down. When I'm done being a Y-hole in regards to my dedication to a project, this will be what will take up all of my work time.