Punchcard Reader

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    • Hardware Store
    Community Content: Punchcard Reader

    As the name states, this contraption reads punchcards, at up to 1 byte every 1.5 seconds.
    Keep in mind, that in this example, 1 byte consists of 7 bits, the read-head can be extended for larger bytes though, with no size-limit on how many bits each byte contains.

    As automatic starmade logic usually has a maximum frequency of 1Hz, the punchcard reader isn't too slow compared to Solid State Logic Memory(SSLM), if read in order. It obviously isn't made for random access.
    The main 3 advantages of punchcards compared to SSLM are:
    • Most effecient mass-storage per block at 1 bit per block. SSLM needs at least 2 blocks per bit.
    • No need to link logic blocks to extend a storage array's length.
    • Easily exchangeable.

    I generally recommend designating 2 bits of the read head to the following purposes[only the former is present in the above example gif]:
    1. Read Clock
      never put a block in its way
      indicates when the read-head is in a reading position
    2. Card presence
      every card should put a block in its way at all times it is under the read-head
      indicates whether or not a card is currently under the read-head(simply because no-card means every bit is read as true)
    Please do suggest improvements.[additional useful reserved bits e.g.]
    I'll soon release an auto-read addon, finding and reading the next card automatically.
     
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    Good that you posted a thread too. Now I can give an extra like.

    This is a remarkable idea. Probably the easiest, fastest and least error-prone way to load lots of data into a circuit. Thanks, mate!
     
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    I'll soon release an auto-read addon, finding and reading the next card automatically.
    As promised, the update:

    The punchcard reader can now automatically skip to the next card, and read it in a single go, no need to instruct it to read every byte.
    I also moved the read-clock out of the read-head, and inserted a card-detector into slot -1, so the sample card and read-head now have 8 data bits.

    The controller-logic outside of the read-head is now also protected by a layer of metal mesh, to highlight the new control-panel.

    I've also separated device-bits and data-bits by light-color.(data is red, device is greem)
    If the read-head detects no card, it will also no longer set all data-bits to true.

    When extending the read-head, do watch out for the device-bits, as some of their connections are different from normal data-bits, and may also link to all data-bits.

     

    nightrune

    Wizard/Developer/Project Manager
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    If you add a jump command you'll almost be turing complete!
     
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    You're a genious!

    I think we can add a auto recompilating system to the card...
    This thing is sooooo cool :D
     
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    • Wired for Logic
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    :( :( :( insta-depression
    Guess what I made last weekend? How did you know? I made a scanner very much like this one!
    The only difference is that I was inspired by the QR code and made a 10 by 10 reader, 100 docked entities.
    QR code scanner
    at least mine has more possibilities :D
     

    NeonSturm

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    Why do you not store bits in logic-connections by updating door-blocks through ORs (which can receive multiple signals)?

    A good addon to a ROM is a Slow RAM.
    I found chained flip-flops are able to hold 1 bit per block, but require exponential time to read/write (if not optimized)

    You would need 1 and-module to address each chain - which gives this formula a fixed offset in block count, +20% for the addressing management blocks.
    2 blocks store 1 bit and are read/write in 2 cycles
    3 blocks store 2 bit and are read/write in 4 cycles
    4 blocks store 3 bit and are read/write in 8 cycles​
    But you may safe 1/2 cycles if you invert the highest bit after each read and write in 1/2 or less time if you know the content.
     
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