Logic with spawned blueprints

[alexsanderr]

It seems that whenever I spawn a copy of my ship, the logic clocks I had running stop and I have to restart it. Is there a way around this. Thanks for any help

 

[Mork2]

Are you using the NOT-Delay clocks or the full Act>Or>Not>Delay clock?

I'm not completely sure but I haven't had any problems using a Act>Or>Not>Delay>back to Or clock. I think if the timing is wrong the Not>Delay clocks fail sometimes on spawn in.

 

[alexsanderr]

I'm using the act>or>not>delay for both my clocks. Neither loads functioning and I have to restart each time. Could it be server lag? I am saving the blueprint when the clocks are working.

 

[Mork2]

If you need to restart the clock each time I would suggest resaving the blueprint. Maybe it's just saved the blueprint saved at the wrong moment in time with the logic.

 

[alexsanderr]

I've moved on to other parts of the ship and have saved the blueprint multiple times since the logic clock has been put in, its still running perfectly on the source ship but for some reason still none of the spawned blueprints start with the clocks running. I appreciated the attempt by the way tho.

 

[Az14el]

Often happens when spawning a BP onto a server for me, i fix the clock then save it again to the server, all future spawns from that new BP should spawn in with their clocks active. Usually with delay/act-or-not pulses i get this.

 

[alexsanderr]

Often happens when spawning a BP onto a server for me, i fix the clock then save it again to the server, all future spawns from that new BP should spawn in with their clocks active. Usually with delay/act-or-not pulses i get this.

Thanks I'll have to try it

 

[Az14el]

Another option would be a simple rail clock, two basic rails facing eachother with a button next to each one and a core riding them is a clock that should never get stuck over BP uploads (unless you want to be able to stop it, which would need a rail speed & a logic state to actually hold over saves ...)

 

[Crusade]

you could create a failover system that reboots the clock if it locks - normally it's caused by a gate being ON for too long and causing the full clock to go high. To resolve this connect all clock modules to an AND gate, then the AND bate to a button and back into the clock. When all the blocks in the clock are high (during a clock fail) the AND should activate, triggering the button and switching modules back off, hopefully rebooting the logic clock.