Fazer Mini: working 8 bit CPU

[takethispie]

well good luck with that ^^

 

[Aizria]

DragonSoulSong well it took me few months JUST to understand the idea and principles of how a CPU work and just then and only then
I was able to start building my first CPU , but dude , that feeling when it's done , you're like : "it's alive ! IT'S AAALLLLIIVVVEEEE " xD

but if one day you have the willing to build CPUs (in logisim not starmade), I will give you every documents (PDF, diagrams) I found wich are really helpfull , just ask

Sounds like a plan! ^.=.^ If I do indeed ever feel up to the challenge, I'll definitely throw a ping your way and let you know! :D Gotta be a great feeling when you finish something like that, I know I feel accomplished even when I succeed at simpler projects of mine. But to have something like this come to life after all of that hard work...it definitely seems like fun. Perhaps some day. :D

 

[takethispie]

yep ! anytime !
oh yeah but after the first it becomes really easier , for me the next big step is to create a working OS with screen and keyboard on the last CPU I've built in logisim and if I succeed I'll feel even more accomplished than when I finished my very first CPU :D

 

[Proxima_Centauri]

Wow
and here I thought I was fairly decent at using logic blocks...
Great work takethispie

I'm betting that the lag is caused by the hundreds of animated connection tubes
I experienced a similar problem a few months back due to my faction's giant factory station (pic related)
http://i.imgur.com/fmL6ncj.png

It's too bad that there isn't an option to turn those things off...

 

[takethispie]

Proxima_Centauri thanks :D
oh ok , I though it was the number of gates as I run starmade with a constant 60-50 fps (60fps limit activated) all the time

yeah that would be great but I'm sure schema is already doing is best, I can wait ^^

 

[takethispie]

OMAGAD IT'S WORKING

with the new update logic works so good ! it's awesome !
*moment of pure happiness*

so I think I will make a little video showing a little program (actually this CPU is so little that I can do a lot of things very impressive)
and I'll ASAP start working on a 16bit CPU with jump, conditional jump (making conditional loops , if/then statements possible), a lot more register, input/outpout, and 20-30 instruction program memory. and THAT IS IMPRESSIVE :D

 

[NeonSturm]

now without lag through false->false logic updates, it might be possible

though I somehow miss the ability to create a non-repeating (not more than once) false->false or true->true logic update as a way to cycle the activation status in an activation1 -> not1 -> activtation2 -> not2 - > activation1 loop.

 

[takethispie]

I didn't see at first but I have issue with register not updating well because of the false->false lag I think (but I'm not sure) :/

 

[Grimson]

This is really interesting. I have been programming computers but I always thought that the hardware would be to complex to under stand. This looks like something I would be interested in. Any tips on where I should look for information.

 

[takethispie]

" computation structures" lecture note of the MIT is really really easy to understand: http://ocw.mit.edu/courses/electric...ring-2009/lecture-notes/MIT6_004s09_lec14.pdf
you can also simply search "MIPS" in google and I can also write a little explanation here wich will really help if you want

 

[takethispie]

gosh I would love so much to continue my work on this CPU
I hope the finite state machine problem will be resolved one day :/

 

[_TheRealAmeRicA]

gosh I would love so much to continue my work on this CPU
I hope the finite state machine problem will be resolved one day :/

bump?

 

[takethispie]

wat ? x)

 

[Thalanor]

Ohh that reminds me of a fun lecture some semesters back
Minecraft bases without at least a partial CPU (ALU) at the very minimum were unthinkable since then (even if practically useless). MC did have a more performant (even if messy, I really didn't like having to lay down the wires individually and nontouching) logic system though, it could support 8-bit CPUs (they worked fine, just took half a world of space), while apparently OP's test shows the optimization doesn't go very far yet in SM.
NuclearFun you too were subjected to the horrors of Xilinx ISE?

 

[takethispie]

since chaosinflesh made his 8bit cpu, I will continue my work on my cpu wich is now going to be a 8bit ( since almost every circuit I've made is stackable )
starting with the program counter I just finished:

it's a 8bit up counter, with parallel load (used for jumps, branches , etc)
frequency: 1hz max
I use a new design of edge triggered register wich use 5 less gates thanks to the Flip Flop block \o/
p.s: 8bit -> 0 to 255

 

[takethispie]

I tried to build a CPU yesterday wich didn't work because I had problem with control signal and synchronisation:

so I decided to build a real MIPS (Microprocessor without Interlocked Pipeline Stages) processor and not just a single cycle MIPS
and here comes the Fazer Mini, for those who are wondering yes it's inspired by the Fazer-P I built in Logisim:

it use only ~2200 logic gates including the 32Byte ROM and has a speed around 1Hz ( well it's more complicated as instruction are splitted in stages, 1 instruction is finished every 0.5-0.6 seconds but a whole instruction takes 2 seconds to go through all 4 stages )

there are few very complex circuits to build ( forwarding unit, interrupt handler, etc) so I think the cpu will use about 3000 gates,
900 more gates than now, when it will be finished

I will do the hello world video too :p

maybe I need to describe each pictures yes no ?

 

[NeonSturm]

it's a 8bit up counter, with parallel load (used for jumps, branches , etc)
frequency: 1hz max
I use a new design of edge triggered register wich use 5 less gates thanks to the Flip Flop block \o/
p.s: 8bit -> 0 to 255

Maybe you could build a NOT-Equivalent to it to have something working at the intermediate phase.
Also I hope you have seen my over-clocking thread in General Discussions. I hope your CPU is stable enough for over-clocking :D

 

[takethispie]

there is no point in using a NOT equivalent ^^
yes but I won't use it, it will not really work because of the gate latency, and have you tried it on a cpu at least ?

 

[NeonSturm]

Well, if you can't use that much information per cycle, there is ofc no use in it.
It would be interesting if both the positive and negative part of a clock cycle is used to transfer information.

 

[takethispie]

Well, if you can't use that much information per cycle, there is ofc no use in it.
It would be interesting if both the positive and negative part of a clock cycle is used to transfer information.

the register are rising edge, I can't use the falling edege of the clock ^^