Working 8-bit CPU =D

[Edymnion]

Yep. We're definently in the Star Wars universe.

Remember, kids: If it looks like a moon, moves like a moon, but has TIE Fighters and lasers, that's no moon...

Fun Fact, the actual reason that they built the Death Star was so that the Emperor could play Solitaire on the work computer. True story.

 

[Chaosinflesh]

Chaosinflesh I guess it's the memory that take the biggest amount of logic gates ? ^^
anyway good work !

Memory certainly accounts for a large portion of the gates ~75% at a guess.
A lot more logic is tied up in MUX's and buses.
There are 8 'warehouses' in the CPU blocks, which you can note from the videos are largely empty - with the exception of the Registers. That block is pretty solid.

How many of those do you have?

I need about +20% control logic for RAM at 10x10y2z and +10% for 18x18y2z logic.
Then again 1/n (n=?x?x2 chips) for the RAM controller.

Where else do you need so much serial<-->parallel conversion?
For a display? Just handle it with a RAM-duping frame-buffer.

I've separated out as much of the common logic as is convenient for my purposes, but most of the logic in the RAM blocks is administrative; especially since I'm using Activation Blocks as a D FF. This meant I had to have a delay loop with MUX to prevent the bus low signal from wiping the RAM, and another MUX for writing a new value, with each MUX being opposite to each other.
Given this, most of the RAM logic is administrative, so there's an extremely high proportion of control logic to actual memory cells.

Yes, the 1950s are a heady time for us space explorers. Surely, the universe will only need, at maximum, five of those "computer" things....
http://ifaq.wap.org/computers/famousquotes.html

I have to be honest, in the process of creating this CPU, I gained a totally new respect for Alan Turing, Grace Hopper and other talented early pioneers of computing technology. We really do stand on the shoulders of giants.

- It is also really fun to walk around this PC as Dave, even though I am not an RP fan.

 

[NeonSturm]

This meant I had to have a delay loop with MUX to prevent the bus low signal from wiping the RAM

Perhaps you should separate into memory controllers, banks and chips.

Summary

• Controller : Handles multi-request stuff and parallel accessing of different Banks
• Bank : Handles chips -> enable|set, write-back and addressing of Chips.
• Chip : Handles addressing of bits. And set|enable of bits depending on set|enable of the bank|row|column.

If you do it right, you will only need 2.2 blocks / bit for ram and 1.4 blocks / bit for SSDs (SSD-Cells : In -> And -> FlipFlop -> FlipFlop -> FlipFlop -> Out).


Details
The memory controller does:

• Lock a ram bank while it is busy (for a given time dependent on read|write).
• Send a ready-for-next value back to the cpu.
• Cache additional writes|reads.
• Prefer reads over writes if the cache is not full.
• Analyse requests and pre-request other values for the case they get requested (when something is idle)

Cache is something you can read or write in 1..2 cycles while the ram may need 4 or more. I have uploaded a community-content RAM, which effectively is build out of cache memory (we didn't have flip-flops back then, and activation blocks which store the last received value would have increased the overhead and read/write time).

The memory bank does:

• Handle 1 request at a time.
• May handle bulk reads/writes (which may skip some parts which make random reads|writes possible)
  
• May handle quick referencing (address -> reference address -> value) to take load from the cpu and far-away logic.
• Receives 2 requests on 2 different inputs - it can cycle between these without having to wait for the controller logic.

The memory chip does:

• Nothing but storing values.
• It is completely obeying the controller and bank logic.
• It has an input and output to the memory bank logic.
• It uses (AND -> FlipFlop) = 1 bit per 2.2 blocks possible
• It may use (AND -> FlipFlop -> Flip-Flop)
  
  • to store 2 bits per 2.3 blocks but at increased read|write time and control logic demands.
• It may use (AND_Row_set|enable -> 8..16x AND_FlipFlop)
  • and (AND_column_set|enable -> 8..16x AND_FlipFlop)
  • to decrease the number of logic connections you have setup.
• It may use (AND_Chip_set|enable -> 8..16x AND_Row_set|enable + 8..16x AND_Column_set|enable)
  • This reduces the number of affected ANDs to (64 .. 256 -> 16 .. 32) and thus reduce the number of calculations StarMade has to do.
  • Also makes addressing Chips easier as you just need to connect (Bank -> Chip1 -> Chip2 -> .. -> Bank)
    • and you need less connections to enable rows/columns on that chip.

 

[walle_222]

You might want to take a look at a shift and add algorithm for multiplication. Its rather simple if you have whats required for it. if you want, i can help you out with it. As far as division goes, i havent gotten around to creating a shift and subtract agorithm yet.

Its not a fully finished 4 bit cpu and gpu (yes im making a gpu just for some 7 segment displays) but both its add and subtract functions work properly for now.

 

[Chaosinflesh]

Thanks. Theres actually a faster method for multiplication than Booth's shift-add. See Dadda or Wallace trees (and there are patents for faster methods too). By the time I got there, I was a) bored with the ALU, and b) impatient to finish.

I'm curious as to what the purpose of a GPU for 7-segment displays is... The logic for them is a well-known standard. Myself, I've just created a 8x16 screen of 5x7 panels, (80 x 56pixels), which I considered using a GPU with a frame-buffer for instead, but That would take forever at StarMade speeds to display anything at all.

 

[Thalanor]

I have to be honest, in the process of creating this CPU, I gained a totally new respect for Alan Turing, Grace Hopper and other talented early pioneers of computing technology. We really do stand on the shoulders of giants.

Appreciation is to be shown where it is due. Our modern society treats the pioneers that made our entire world possible like crap, while scraping the bottom of the barrel for their idol of the week. It sickens me deeply to see so much misplaced admiration for complete human failures, all while most people don't even know the names of the heroes that made their candy crush smearpads a reality today. /rant


As for purely 7-segment displays: they can be hardwired easily enough. If you go the GPU route, consider making it per-pixel adressable. Multifunctional displays ftw!

 

[NeonSturm]

One of my past teachers got interested in SM

because of the awesome logic!​

I met him today, told him about the and, or, not, delay, raising-edge-detector, ... and he said he is searching something like that for 10 years.


We both are interested in shorter delays on delay blocks, just like many others.
I hope schema takes this chance and adds a configurable delay block for teaching-logic-purposes.

 

[Thalanor]

Not only for teaching logic - also for damn fast sequential logic that controls meaningful stuff. Yes pls!

 

[Snk]

...but what's it do?

 

[walle_222]

Thanks. Theres actually a faster method for multiplication than Booth's shift-add. See Dadda or Wallace trees (and there are patents for faster methods too). By the time I got there, I was a) bored with the ALU, and b) impatient to finish.

I'm curious as to what the purpose of a GPU for 7-segment displays is... The logic for them is a well-known standard. Myself, I've just created a 8x16 screen of 5x7 panels, (80 x 56pixels), which I considered using a GPU with a frame-buffer for instead, but That would take forever at StarMade speeds to display anything at all.

I have looked attempted to look at those methods and have found either nothing on then or they are much too complicated to implement for me lol.

Also, my algorithm is a heavily modified algorithm of shift and add. Basically i use right shift, and if there is an overflow, it sends a flag that calls a custom algorithm to calculate that. then i store the result for use later until the operation is finished, then send the data to the gpu.

As far as gpu for 7 segment displays goes, if you have a result ( from addition or multiplication) that is larger than 9, it requires an immense amount more hardwiring than is actually probably efficient. so my idea was to create my own algorithm for a gpu that subtracted in series of 10, 100, or 1000 and used a magnitude comparitor to determine the value of all the digits in our base 10 number system. Basically just subtract by 10, or 100 until the result is less than 10 or 100 respectively, then output the result to the proper display segment.

 

[Chaosinflesh]

As far as gpu for 7 segment displays goes, if you have a result ( from addition or multiplication) that is larger than 9, it requires an immense amount more hardwiring than is actually probably efficient. so my idea was to create my own algorithm for a gpu that subtracted in series of 10, 100, or 1000 and used a magnitude comparitor to determine the value of all the digits in our base 10 number system. Basically just subtract by 10, or 100 until the result is less than 10 or 100 respectively, then output the result to the proper display segment.

Ah right. Have you considered using Binary Coded Decimal (which was used heavily in early calculators)? Last time I made a screen like what [I think] you're describing, I was lazy and just left it in hex.

 

[walle_222]

Ah right. Have you considered using Binary Coded Decimal (which was used heavily in early calculators)? Last time I made a screen like what [I think] you're describing, I was lazy and just left it in hex.

Thats exactly what i was planning on doing. Now if i could stop playing planetside and working on modding another ship i might get that done lol

 

[Snk]

What can you use this for?

 

[walle_222]

What can you use this for?

Making a calculator, making an automated factory, controlling doors and other things on ships... etc.

 

[Snk]

Making a calculator, making an automated factory, controlling doors and other things on ships... etc.

Has anyone built this computer on their ship yet?